Difference between revisions of "Main Page"

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08/14/2017
 
08/14/2017
  
* FE warm testing should continue with the A series ASICs on hothdaq2
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Shift leader: Jyoti Joshi (jjoshi@bnl.gov x8231)
 +
 
 +
QC: Mary Bishai (mbishai@bnl.gov x4877)
 +
 
 +
* FE ASIC warm testing should continue with the A series ASICs on hothdaq2
 
* ADC cold single socket testing should continue with the D series ASICs on hothdaqs 4 (vertical) & 5 (horizontal)
 
* ADC cold single socket testing should continue with the D series ASICs on hothdaqs 4 (vertical) & 5 (horizontal)
 
* Brian/Justin will be working on quad socket ADC development on hothdaq3
 
* Brian/Justin will be working on quad socket ADC development on hothdaq3

Revision as of 20:59, 17 August 2017

Welcome to the DUNE Wiki!

Getting Help

Questions or comments about this Wiki? Please write to Maxim and Brett (potekhin AT bnl.gov, bv AT bnl.gov). See the Help entry of the navigation bar on the left for more guidance about this wiki.

If you just joined DUNE, welcome aboard! Information for new members.

DUNE Institutions and people

Publications

Select publications by and about DUNE are collected in the Publications topic.

CERN

Useful CERN Links:

CERN Prototype

CERN Account Management

Once a membership is established, the account may be configured (e.g. one can create secondary and/or service accounts and apply for group membership at the CERN Account Management Page.

Detectors, Physics, planning, general interest

DUNE Far Detectors

Current and future prototypes

DUNE and its predecessor LBNE

Other Experiments

DUNE Computing

Please visit the DUNE Computing topic. Some direct links:


ProtoDUNE Cold Electronics Testing

Run Plan

08/14/2017

Shift leader: Jyoti Joshi (jjoshi@bnl.gov x8231)

QC: Mary Bishai (mbishai@bnl.gov x4877)

  • FE ASIC warm testing should continue with the A series ASICs on hothdaq2
  • ADC cold single socket testing should continue with the D series ASICs on hothdaqs 4 (vertical) & 5 (horizontal)
  • Brian/Justin will be working on quad socket ADC development on hothdaq3
  • Brian will be testing CE boxes on hothdaq1
  • Oscillator and flash testing complete for now (big thank you to Jim for flash testing the past two days and to Arbin/Brian for getting the flash setup operational so quickly)

If we run out of labeled A or D series ASICs, there are pens in the cabinet. Please self-certify as having good handwriting if you are going to label chips. I suggest doing no more than 50-100 at a time as handwriting deteriorates with fatigue.

Shift Sign-Up Calendar

Please sign up for shifts in the above Google calendar and notify Quality Control co-ordinators and Shift Leaders by sending them email. New shifters need to take all the required training, read and sign the ESR (Experiment Safety Review) before shift.

Required Training

Below are the training courses required to work on Cold Electronics Testing

  • Cybersecurity (GE-CYBERSEC)
  • Physics department ALARA (PO-RADALARA-W)
  • Cryogen Safety (HP-OSH-025)

In addition to completing the above training courses, the shifter needs to get a BNL Domain Account (Windows) and review and sign the lab's Experimental Safety Review (ESR) PO-067-2016. When signing the ESR remember to only select the required training courses indicated above.

Shift E-logs

Every shifter is required to fill the above Google sheet for every test attempted during shift. Select the appropriate shift sheet as per your shift station (hothdaq1, hothdaq2, hothdaq3 ...etc) and fill all the fields as listed in the sheet. Write proper and detailed description of the Run in the "Notes" column, for example, if a run fails, give a concise description of the error that occurred and at what testing stage.

The shift leader is required to add a daily shift summary at end of the shift in the above link as well as any issues needing expert attention. Along-with the shift summary, system experts should also record changes occurring testing code, releases and bug fixes etc.

Front-END ASIC Testing

Shifter instructions on the FE ASIC test procedure.

ADC ASIC Testing

Shifter instructions on the ADC ASIC cold test procedure:

Expert instructions on ADC ASIC test procedures:

ADC ASIC Summary Plots (Accessible only within BNL):

Oscillator Testing

Shifter instructions on Oscillator cold test procedures:

Flash Memory Tester

Shifter instructions on Flash memory cold test procedures.

Meetings

We have a shift leaders meeting on every Monday at 9:00 am (EDT) and Wednesday at 8:30 am (EDT). This meeting is reserved for making daily run plans and expert discussions.

We have weekly meeting on CE Testing Status on Friday at 2:30 pm (EDT). The link to the indico page for these meetings is listed below Cold Electronics Weekly Shift Mtg

Sign-up for ce-teststands-l@lists.bnl.gov email list to get meeting notifications.