Difference between revisions of "ProtoDUNE CE test"
(Created page with "= ProtoDUNE Cold Electronics Testing = == Run Plan == 09/11/2017 Shift leader: Guang (gyang@nngroup.physics.sunysb.edu) QC: Mary Bishai (mbishai@bnl.gov x4877) * No shift...") |
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| − | + | = Run Plan = | |
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09/11/2017 | 09/11/2017 | ||
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If we run out of labeled A or D series ASICs, there are pens in the cabinet. Please self-certify as having good handwriting if you are going to label chips. I suggest doing no more than 50-100 at a time as handwriting deteriorates with fatigue. | If we run out of labeled A or D series ASICs, there are pens in the cabinet. Please self-certify as having good handwriting if you are going to label chips. I suggest doing no more than 50-100 at a time as handwriting deteriorates with fatigue. | ||
| − | + | = Shift Sign-Up Calendar = | |
* [https://docs.google.com/spreadsheets/d/15a-QsJhyJppWninh5XQquv_DmerxDRAn_NDW2tmgj4c/edit#gid=957907399 Cold Electronics Shift Calendar] | * [https://docs.google.com/spreadsheets/d/15a-QsJhyJppWninh5XQquv_DmerxDRAn_NDW2tmgj4c/edit#gid=957907399 Cold Electronics Shift Calendar] | ||
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*[https://ias.bnl.gov/ESR/ Link to ESR] | *[https://ias.bnl.gov/ESR/ Link to ESR] | ||
| − | + | = Shift E-logs = | |
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The shift leader is required to add a daily shift summary at end of the shift in the above link as well as any issues needing expert attention. Along-with the shift summary, system experts should also record any changes occurring in testing code, releases, bug fixes, expert instructions, hardware status... etc. | The shift leader is required to add a daily shift summary at end of the shift in the above link as well as any issues needing expert attention. Along-with the shift summary, system experts should also record any changes occurring in testing code, releases, bug fixes, expert instructions, hardware status... etc. | ||
| − | + | = Front-END ASIC Testing = | |
Shifter instructions on the FE ASIC test procedure. | Shifter instructions on the FE ASIC test procedure. | ||
*[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/FE/ProtoDUNE_FE_ASIC_Test_Procedure.pdf FE ASIC Test Procedure] | *[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/FE/ProtoDUNE_FE_ASIC_Test_Procedure.pdf FE ASIC Test Procedure] | ||
| − | + | = ADC ASIC Testing = | |
Shifter instructions on the ADC ASIC cold test procedure: | Shifter instructions on the ADC ASIC cold test procedure: | ||
*[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/ADC/ADC_Shift_Instructions.md ADC ASIC Test-stand Cold Test Shifter Instructions (single socket)] | *[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/ADC/ADC_Shift_Instructions.md ADC ASIC Test-stand Cold Test Shifter Instructions (single socket)] | ||
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*[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/ADC/README.md ADC Test-stand Expert Documentation] | *[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/ADC/README.md ADC Test-stand Expert Documentation] | ||
| − | + | = Oscillator Testing = | |
Shifter instructions on Oscillator cold test procedures: | Shifter instructions on Oscillator cold test procedures: | ||
*[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/OscillatorTesting/README.md Oscillator Testing Instructions] | *[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/OscillatorTesting/README.md Oscillator Testing Instructions] | ||
| − | + | = Flash Memory Tester = | |
Shifter instructions on Flash memory cold test procedures. | Shifter instructions on Flash memory cold test procedures. | ||
*[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/FlashTesting/FlashTestingInstructions.pdf Flash Memory Test Procedure] | *[https://github.com/DUNE/femb_doc/blob/master/test_stand_expert/FlashTesting/FlashTestingInstructions.pdf Flash Memory Test Procedure] | ||
| − | + | = CE Test Summaries = | |
Summary tables and plots - with links to the full data in the Sumatra database - for ADC/FE ASIC/XO/Flash/FEMB testing are available at: | Summary tables and plots - with links to the full data in the Sumatra database - for ADC/FE ASIC/XO/Flash/FEMB testing are available at: | ||
*[http://www.phy.bnl.gov/coldelec/summary/ ASIC and FEMB Test Summaries] | *[http://www.phy.bnl.gov/coldelec/summary/ ASIC and FEMB Test Summaries] | ||
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Contact Brett Viren (bviren@bnl.gov) for access. | Contact Brett Viren (bviren@bnl.gov) for access. | ||
| − | + | = Meetings = | |
We have weekly meetings on CE Testing Status on Friday at 2:30 pm (EDT). The link to the indico page for these meetings is listed below | We have weekly meetings on CE Testing Status on Friday at 2:30 pm (EDT). The link to the indico page for these meetings is listed below | ||
Latest revision as of 20:38, 19 December 2017
Contents
Run Plan
09/11/2017
Shift leader: Guang (gyang@nngroup.physics.sunysb.edu)
QC: Mary Bishai (mbishai@bnl.gov x4877)
- No shifts Monday morning and early afternoon for review. Resume full shifting on Tuesday 9/12
- FE ASIC warm testing should continue with the A series ASICs on hothdaq2
- ADC cold single socket testing should continue with the D series ASICs on hothdaqs 4 (vertical) & 5 (horizontal)
- Quad board cold tests recommence on Hothdaq3 with quad board #2. First test chips tested before.
- No FEMB testing
- Flash memory testing continues on Hothdaq6
If we run out of labeled A or D series ASICs, there are pens in the cabinet. Please self-certify as having good handwriting if you are going to label chips. I suggest doing no more than 50-100 at a time as handwriting deteriorates with fatigue.
Shift Sign-Up Calendar
Please sign up for shifts in the above Google calendar and notify the Quality Control Co-ordinators (QC) and Shift Leaders by sending them email. New shifters need to take all the required training, read and sign the ESR (Experiment Safety Review) before shift.
Required Training
Below are the training courses required to work on Cold Electronics Testing
- Cybersecurity (GE-CYBERSEC)
- Physics department ALARA (PO-RADALARA-W)
- Cryogen Safety (HP-OSH-025)
- Electric benchtop training (TQ-ELECT-BENCHTOP)
In addition to completing the above training courses, the shifter needs to get a BNL Domain Account (Windows) and review and sign the lab's Experimental Safety Review (ESR) PO-067-2016. When signing the ESR remember to only select the required training courses indicated above.
Shift E-logs
Every shifter is required to fill the above Google sheet for every test attempted during shift. Select the appropriate shift sheet as per your shift station (hothdaq1, hothdaq2, hothdaq3 ...etc) and fill all the fields as listed in the sheet. Write proper and detailed description of the Run in the "Notes" column, for example, if a run fails, give a concise description of the error that occurred and at what testing stage.
The shift leader is required to add a daily shift summary at end of the shift in the above link as well as any issues needing expert attention. Along-with the shift summary, system experts should also record any changes occurring in testing code, releases, bug fixes, expert instructions, hardware status... etc.
Front-END ASIC Testing
Shifter instructions on the FE ASIC test procedure.
ADC ASIC Testing
Shifter instructions on the ADC ASIC cold test procedure:
- ADC ASIC Test-stand Cold Test Shifter Instructions (single socket)
- ADC ASIC Test-stand Cold Test Shifter Instructions (quad socket)
Expert instructions on ADC ASIC test procedures:
Oscillator Testing
Shifter instructions on Oscillator cold test procedures:
Flash Memory Tester
Shifter instructions on Flash memory cold test procedures.
CE Test Summaries
Summary tables and plots - with links to the full data in the Sumatra database - for ADC/FE ASIC/XO/Flash/FEMB testing are available at:
Contact Brett Viren (bviren@bnl.gov) for access.
Meetings
We have weekly meetings on CE Testing Status on Friday at 2:30 pm (EDT). The link to the indico page for these meetings is listed below
Cold Electronics Weekly Shift Mtg
Sign-up for ce-teststands-l@lists.bnl.gov email list to get meeting notifications.
